Jobid: 6e65a1459576 (0.0497)
Exciting new position available with a cutting-edge semiconductor company, located in the Randstad area of The Netherlands.
Excellent salary available, benefits and shares:
The ideal candidate will have a mixture of digital design and digital verification experience over the last 5+ years.
Bachelor/Masters/PHD in Electronic Engineering or similar field
ASIC knowledge of complex tape-out projects
Detailed understanding of UVM environments and RTL coding in verilog / system verilog
Must have good scripting skills too – python, matlab, system C/C++
Additional “nice to have skills” include knowledge of the full digital design flow, from architecture to RTL-GDS2
Visa sponsorship is available
Lees hier meer…
Deel deze vacature:
